1. Field of the Invention
The present invention relates to a reference voltage circuit of a semiconductor integrated circuit.
2. Description of the Related Art
A circuit shown in FIG. 3 is known as a conventional reference voltage generating circuit. That is, the circuit includes a constant current circuit comprised of an n-channel depletion type MOS transistor 170 having its source and gate grounded, a current mirror circuit formed of p-channel enhancement type MOS transistors 150 and 151, for generating and outputting a mirrored current out of a current input from the transistor 170, and an n-channel enhancement type MOS transistor 160 having its gate and drain connected to each other, for generating a reference voltage Vref from the current output by the current mirror circuit.
In the case where the transistors 150 and 151 are the same size, a drain current ID(170) of the transistor 170 is equal to a drain current ID(160) of the transistor 160, and a gate-source voltage VGS(160) of the transistors 160 becomes the reference voltage Vref.
In order that the reference voltage Vref becomes a predetermined voltage, all the transistors must operate in a saturated state. When a minimum drain-source voltage at which the transistor 170 operates in the saturated state is made VDSAT(170) and a drain-source voltage of the transistor 150 is made VDS(150), a minimum power source voltage Vdd(min) at which the reference voltage Vref becomes the predetermined voltage is obtained by the following equation:
Vdd(min)=VDSAT(170)+VDS(150)xe2x80x83xe2x80x83(1)
When the threshold value of the transistor 170 is made Vt(170), the minimum drain-source voltage VDSAT(170) at which the n-channel depletion type MOS transistor 170 operates in the saturated state is obtained by the following equation:
VDSAT(170)=Vt(170)xe2x80x83xe2x80x83(2)
Normally, since Vt(170) is approximately xe2x88x920.4 V and VDS(150) is approximately 1.0 V, from the equation (1), Vdd(min) is obtained by the following equation:
Vdd(min)=xe2x88x920.4 V+1.0 V=1.4 Vxe2x80x83xe2x80x83(3)
In the conventional reference voltage circuit shown in FIG. 3, there has been a problem that in the case of a low power source voltage, a circuit operation becomes unstable and the predetermined reference voltage Vref can not be generated.
If an attempt is made to obtain the predetermined reference voltage Vref even at a low power source voltage, it is necessary to increase the threshold value of the n-channel depletion type MOS transistor (the absolute value is made to approach zero) or to increase the threshold value of the p-channel enhancement type MOS transistor (the absolute value is made to approach zero), however, if doing so, the operation becomes impossible at high temperatures or at low temperatures.
The present invention has been made in view of the above, and an object of the present invention is therefore to enable an operation at a low power source voltage by changing a circuit structure.
In order to solve the problem, according to the present invention, a structure of a circuit is devised such that a predetermined reference voltage Vref can be obtained even at a power source voltage lower than a conventional one.
By adopting such a structure, it is possible to provide a high accuracy reference voltage generator in a semiconductor integrated circuit, which can stably operate even at a low power supply voltage.
The present invention provides a circuit structure in which a predetermined reference voltage Vref can be obtained even at a power supply voltage lower than a conventional one.